There is a memory device in which memory cells are three-dimensionally aligned by forming a memory hole in a stacked body where a plurality of electrode layers functioning as control gates in the memory cells and a plurality of insulating layers are alternately stacked, forming a charge storage film on a side wall of the memory hole, and then providing silicon serving as a channel in the memory hole.
As a data erasing method specific to such three-dimensional stacked memory, there is proposed an erasing method using a GIDL (Gate Induced Drain Leakage) current. For using the erasing method, a high-concentration impurity diffusion region is required in a channel body layer in the vicinity of an upper end of a select gate provided on the memory cell. In addition, in this kind of memory device, it is desired that a threshold voltage of a select gate is more stable.